Skip to Content
axiomos-simOverview

axiomos-sim (voln-vp) Overview

Relevant source files

voln-vp (“Virtual Platform for axiomOS Development”, repository volnlabs/voln-vp, local checkout axiomos-sim) boots and tests prebuilt axiomOS images under QEMU or Renode. It is a thin developer platform that composes existing emulators behind one CLI. It never reimplements a simulator, never builds axiomOS, and never writes into the axiomOS source tree.

This documentation describes the main branch (head 8457aa1, “fix(backends): verify prebuilt guest boots without source writes”). Pages covering work that exists only on the unmerged branch stack ending at fix/adapter-pid-readiness (artifact manifests, result records, runtime scenarios, RP1 models) say so explicitly and link to that branch.

Purpose

The design spec frames two questions the platform should answer before touching hardware:

  1. Will it work? Peripheral drivers (RP1 GPIO/PWM/I2C/SPI/UART/ADC), the post-firmware boot path, and application logic against sensors.
  2. How fast is it? Deterministic reproduction of timing-dependent bugs now; calibrated latency through a reserved gem5 backend later.

On main the implemented scope is narrower: a bounded boot smoke check that launches explicit prebuilt inputs and requires specific UART markers.

BackendQuestion (per spec)Status on main
qemuDoes it boot? Multi-arch smoke (x86_64, AArch64, RISC-V)Implemented for board virt
renodeWill it work on Pi 5? Drivers, sensors, determinismImplemented for board virt-pi5 (boot only)
gem5How fast? Calibrated latencyReserved, no code

Architecture: CLI, adapters, backends

The core knows no backend by name. It discovers boards/*/board.toml and backends/*/manifest.toml, resolves a board to a backend, and executes that backend’s adapter script for the requested verb. Exit codes propagate so CI cannot false-green.

Per the spec, the CLI’s entire job is discover, validate, launch, collect exit code. It is explicitly not a scheduler, workflow engine, configuration language, or plugin loader.

LayerLocationRole
CLIcli/ (crate and binary voln-vp)Parse doctor/run/test, discover manifests, dispatch, propagate exit code
Boardsboards/<name>/board.tomlSimulator-neutral description: memory, default backend, supported backends; per-backend renders in subdirectories
Backendsbackends/<name>/manifest.toml + adapters/*.shSelf-describing directory implementing the adapter contract
Probestools/, renode/probes/, docs/probes/Phase 1 risk-gate harness and dated evidence logs

See Adapter Contract and CLI Reference.

Relation to axiomOS

axiomOS is an external, read-only artifact source. The same unmodified kernel image is meant to run everywhere; the machine is made to fit the kernel, not the reverse (“no sim-specific kernel code paths”).

  • No kernel path is guessed from an axiomOS checkout. Inputs come from environment variables such as AXIOMOS_KERNEL and AXIOMOS_DISK_IMAGE.
  • Input hashes identify the files used, not their source commit or build features.
  • test requires the userspace banner === axiomos eBPF init === (QEMU x86_64/AArch64 and Renode virt-pi5). RISC-V requires its demo and OpenSBI messages, which proves demo boot only.
  • AXIOMOS_ROOT and old xtask runner options such as --headless are no longer used.
  • The README states that the newer axiomOS v0.5 runtime worktree is not qualified by these boot checks.

No target is declared boot-ready on main. Recorded live runs fail inside the guest (Pi 5 embedded-rootfs allocation panic; x86_64 BOOT_FATAL code=root-filesystem-invalid), and compatible AArch64/RISC-V virt images were not validated. See Probes and Evidence.

Project phases

TODO_NOW.md tracks the spec’s phase order:

PhaseContentState on main
0Precondition: spec read, axiomOS buildableDone
1Risk gate: boot axiomOS to UART on stock Renode ARMv8-APASS (2026-07-30)
2CLI, adapter contract, board manifests, virt-pi5 bootDone except 2.13 boot-to-userspace, blocked by the axiomOS rootfs allocation panic
3RP2040 reuse audit, PCIe RC, RP1 models, driver suiteUnchecked on main (audit and unit models exist on branches)
4Sensors, injection, trace replayBlocked
5CI hardening, nightlyBlocked for scenario wiring

Non-goals (from the design spec)

  • The Pi 5 firmware stage (bootrom, EEPROM, VideoCore) is not simulated; simulation enters at the kernel with a DTB.
  • The GPU is not simulated.
  • Jetson is deferred; only a future board slot is reserved.
  • Physics is never built in-house; a future Gazebo/Webots bridge backend may feed sensor values.
  • No custom GUI; Perfetto export and a VS Code extension are future slots.
  • No distributed simulation or message-bus abstraction.

Reserved verbs

bench is declared in the manifest Verb enum but rejected during manifest validation (“verb bench is reserved; no implementation exists”). The spec also reserves replay, trace, and flash, which have no code.

Last updated on